1. We proposed 8 kinds of full adder and all of them are realized in 4 bit ripple carry adder.

2. We take the Full Adder as an example to introduce the use of VHDL in the design of digital system, the experiment of digital circuit and the teaching.

3. In this paper, we present a polarization-encoded optical full adder by using an inverse vector realized by transmissive feedback.

4. Full adders are discussed, and a multiplexer based full adder is designed.

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5. The modification was nearly negligible in which the full adder cells are substituted by cells termed modified full adder and such design has not any additional critical paths inside the adders.

6. A model of algorithm has been proposed for composite neural network and the classification results of high precision are obtained through a full adder (FA) fostered by the model.

7. Binary Addition and Subtraction, Implementation and Performance of the Full Adder, High-speed Addition, Signed Arithmetic.

8. The practicability of the system is validated by implementing the simulation of a one-bit full adder based on FPGA.

9. The ideas presented in this paper are then demonstrated on the design of an ECL 1-bit full adder.

10. Based on logic gates of complementary single-electron transistor (SET), three units are proposed as follows: full adder, shift register and ROM.